The present invention is directed, in general, to semiconductor fabrication and, more specifically, to a method of manufacturing a silicon nitride stack and a semiconductor device employing the stack produced by way of the method.
Local oxidation of silicon (LOCOS), in which a silicon nitride (Si3N4) film acts as an oxidation mask and pad oxide is inserted between the nitride and silicon substrate, has been widely used as an isolation technique of very large-scale integrated (VLSI) circuits. As device scaling reaches beyond the sub-half-micron level, one of the key limitations is the device isolation technique. The ideal isolation technique must allow minimum isolation spaces, minimum bird""s beak encroachment, minimum defect formation and isolation leakage, process controllability, and cost effectiveness.
LOCOS refers to selective oxidation in device isolation spaces while leaving active device areas unoxidized. The active device area is protected from oxidation by low-pressure chemical vapor deposition (LPCVD) deposited nitride hard masking. Poly buffered LOCOS (PBL) utilizes polysilicon or amorphous silicon (xcex1-Si) as a buffer between the pad oxide and masking nitride to prevent stress-induced defects. This application of polysilicon allows thinner pad oxide and thicker nitride.
Conventional LOCOS and its derivatives have been remarkably successful in meeting device isolation requirements for metal oxide semiconductors (MOS) technologies developed and manufactured over the last twenty years. There are several reasons for the longevity of LOCOS-based approaches. First, its use of relatively simple and well-controlled process steps ensures high manufacturability. Second, the evolution of more advanced forms of LOCOS have demonstrated a continual reduction in the lateral field oxide encroachment (bird""s beak), thereby resulting in denser circuits. Finally, device isolation has been enhanced by process changes resulting from metal oxide semiconductor field effect transistor (MOSFET) scaling. Shallow junctions and high well doping are good examples of the synergistic requirements between the isolation and MOSFET process modules.
During the formation of the field oxide (FOX), a xe2x80x9cbird""s-beakxe2x80x9d is formed, which partially extends under the nitride layer. Bird""s beak encroachment refers to lateral oxidation encroachment due to lateral oxygen diffusion beneath the masking nitride, forming the shape of a bird""s beak. The encroachment reduces the effective size of the device active regions, thus limiting further scale down. Bird""s beak encroachment is measured from the edge of the masking nitride to the end of oxidation beneath the nitride. As is well known, the bird""s-beak produces stress to the nitride layer resulting in nitride lifting and micro-cracks. Therefore, a stress nonuniformity in the nitride layer always exists.
In 0.9 micron size technologies, there were few deleterious effects associated with the formation of the bird""s-beak, since the FOX thickness was typically around 700 nm and the pad oxide (PADOX) thickness was typically around 20 nm. Thus, even if all of the nitride layer was not removed during the first etch, additional etching could be safely conducted without substantial FOX loss and reduction in the overall thickness of the FOX. Moreover, there was not great concern for puncturing through the PADOX and into the silicon substrate during the additional etching process since the PADOX was thicker.
However, as the design rules have decreased to sub-0.5 micron sizes, the thicknesses of the FOX and PADOX have also decreased. The FOX thickness has decreased to about 400 nm and below and the PADOX thickness has decreased to about 1.5 nm. As such, LOCOS processes using steam FOX have become less desirable because of the harmful effects of the bird""s-beak.
In these sub-0.5 xcexcm technologies, the extension of the bird""s-beak under the nitride layer causes oxide/nitride stack lifting. Stress within the nitride layer generated during nitride deposition coupled with stress acquired from bird""s beak encroachment results in uneven stress distribution within the nitride layer, causing the nitride layer to etch unevenly. This uneven etching is highly undesirable because the FOX""s thickness is now 400 nm or less, and the large FOX thickness loss during wet etching results in severe compromise on isolation.
Furthermore, the effects of the bird""s-beak with respect to the non-uniform etching of the nitride layer is exacerbated by the facts that conventional deposition processes produce a nitride layer that has a thickness variability of 10% or greater, and the PADOX layers in present day semiconductor devices are around 10.0 nm thick versus the 20 nm thickness found in former technologies. Because of this high thickness variability in the nitride layer and the thinness of the PADOX, the PADOX layer may be inadvertently etched through during the removal of the nitride layer. If the PADOX layer is penetrated and the etch proceeds into the substrate, the semiconductor device may be damaged and may have to be discarded. Therefore, it is highly desirable that the nitride layer have minimum stress and thickness variability for uniform nitride removal with minimum FOX loss and PADOX punch through.
To alleviate the problems associated with the conventional LOCOS process (e.g., long bird""s beak enchroachment using steam FOX), other isolations schemes, such as the of PBL, have been proposed. The PBL process reduces the bird""s-beak encroachment but creates other processing problems. Unfortunately, however, the PBL isolation process inherently poses several process difficulties. Two important limitations of these isolation schemes are bird""s beak encroachment and field oxide thinning effect.
Field oxide thinning refers to the oxidation growth rate difference between submicron isolation spacing and limited spacing ( greater than 1.0 xcexcm) in the same wafer. The oxidation growth rate in isolation spaces 21 1.0 xcexcm may achieve the targeted oxide thickness, while the growth rate in the submicron area is significantly suppressed. The thinning effect is significantly increased as isolation space decreases. This effect poses significant challenges to effective device isolation and smooth surface topology for sub-0.5-xcexcm technologies. Accordingly, minimization of field oxide thinning is essential.
In addition to the PBL, other isolation processes have been proposed that involve a dry oxide process. Dry oxide processes also reduce the bird""s beak, which, in turn, allows LOCOS isolation for sub-0.5 xcexcm design rules. While this process does limit the effects of the bird""s-beak, it, unfortunately, has the drawbacks of requiring very high temperatures and requiring long periods of time in which to grow the FOX to the appropriate thickness. Therefore, dry FOX LOCOS isolation scheme should accompany a lowering of FOX thickness and a tighter control of PADOX/nitride properties during CMOS processing.
Still further processes have involved forming a thicker PADOX. When combined with the fact that conventional processes for forming the nitride layer produces a nitride layer having a thickness variability of 5% or greater, this proposed process produces a problem, which only amplifies the above-discussed problems. The problem is that the thicker PADOX simply increases the bird""s beak length, which, in turn, increases the amount of stress in the nitride layer. The increased stress within the nitride layer increases the etch variability of the nitride layer, which, in turn, increases the possibility of puncturing the PADOX.
Therefore, what is needed in the art is a process that does not include the disadvantages associated with the isolation schemes of the prior art. The present invention addresses these needs.
To address the above-discussed deficiencies of the prior art, the present invention provides methods of manufacturing an isolation structure over a substrate such as that typically found in semiconductors. In one advantageous embodiment, the method includes the steps of: (1) depositing a first stack-nitride sublayer over the substrate at a first deposition rate and (2) subsequently depositing a second stack-nitride sublayer over the first stack-sublayer at a second deposition rate that is different from the first deposition rate. The first and second deposition rates provide first and second stack-sublayers that cooperate to form a uniform thickness of the isolation structure over the substrate and provide a stress-accommodating system within the isolation structure. In one embodiment, the first deposition rate preferably ranges from about 0.5 nm per minute to about 1 nm per minute and the second rate of deposition preferably ranges from about 3 nm per minute to about 5 nm per minute.
The present invention therefore introduces a method of manufacturing a relatively uniform isolation structure having multiple nitride sublayers. The varying rates of deposition, and in some embodiments, accompanying changes in mixture ratio, as well as pressure changes produce a nitride stack that is better able to absorb stress, has greater uniformity and is far less subject to the disadvantageous phenomenon of stack lifting, particularly encountered in semiconductor having a PADOX layer deposited thereon.